What Is The Register Destination Of The Instruction Given

Associates - Registers

Processor operations generally involve processing information. This data can be stored in retentiveness and accessed from thereon. However, reading data from and storing data into memory slows down the processor, as it involves complicated processes of sending the data request beyond the control coach and into the memory storage unit and getting the data through the same aqueduct.

To speed up the processor operations, the processor includes some internal memory storage locations, called registers.

The registers store data elements for processing without having to access the retentivity. A limited number of registers are congenital into the processor chip.

Processor Registers

There are ten 32-scrap and six sixteen-chip processor registers in IA-32 architecture. The registers are grouped into three categories −

Full general registers,
Control registers, and
Segment registers.

The general registers are farther divided into the following groups −

Data registers,
Pointer registers, and
Index registers.

Data Registers

Iv 32-fleck data registers are used for arithmetic, logical, and other operations. These 32-bit registers tin be used in three ways −

Every bit complete 32-bit information registers: EAX, EBX, ECX, EDX.
Lower halves of the 32-bit registers tin can be used every bit 4 sixteen-bit data registers: AX, BX, CX and DX.
Lower and higher halves of the higher up-mentioned four sixteen-chip registers can be used as eight viii-bit data registers: AH, AL, BH, BL, CH, CL, DH, and DL.

Data Registers

Some of these data registers have specific use in arithmetical operations.

AX is the primary accumulator; it is used in input/output and most arithmetic instructions. For case, in multiplication operation, one operand is stored in EAX or AX or AL register according to the size of the operand.

BX is known as the base annals, every bit information technology could be used in indexed addressing.

CX is known every bit the count register, as the ECX, CX registers store the loop count in iterative operations.

DX is known as the data register. It is also used in input/output operations. It is too used with AX annals along with DX for multiply and divide operations involving big values.

Pointer Registers

The pointer registers are 32-bit EIP, ESP, and EBP registers and corresponding sixteen-bit correct portions IP, SP, and BP. There are 3 categories of pointer registers −

Instruction Pointer (IP) − The 16-bit IP register stores the commencement address of the next instruction to be executed. IP in association with the CS register (as CS:IP) gives the complete address of the electric current instruction in the lawmaking segment.
Stack Pointer (SP) − The 16-bit SP annals provides the showtime value within the program stack. SP in association with the SS register (SS:SP) refers to be current position of information or address inside the plan stack.
Base Pointer (BP) − The 16-bit BP annals mainly helps in referencing the parameter variables passed to a subroutine. The address in SS register is combined with the showtime in BP to get the location of the parameter. BP can also be combined with DI and SI as base of operations register for special addressing.

Pointer Registers

Index Registers

The 32-bit alphabetize registers, ESI and EDI, and their xvi-fleck rightmost portions. SI and DI, are used for indexed addressing and sometimes used in addition and subtraction. There are two sets of alphabetize pointers −

Source Index (SI) − It is used as source index for cord operations.
Destination Alphabetize (DI) − It is used as destination index for cord operations.

Index Registers

Command Registers

The 32-bit education pointer register and the 32-bit flags annals combined are considered equally the control registers.

Many instructions involve comparisons and mathematical calculations and change the status of the flags and some other conditional instructions test the value of these condition flags to take the command flow to other location.

The common flag bits are:

Overflow Flag (OF) − It indicates the overflow of a high-guild bit (leftmost bit) of data after a signed arithmetic operation.
Direction Flag (DF) − It determines left or right direction for moving or comparison cord data. When the DF value is 0, the string functioning takes left-to-correct direction and when the value is set to 1, the string operation takes right-to-left management.
Interrupt Flag (IF) − It determines whether the external interrupts like keyboard entry, etc., are to be ignored or processed. It disables the external interrupt when the value is 0 and enables interrupts when set up to 1.
Trap Flag (TF) − It allows setting the operation of the processor in unmarried-step mode. The DEBUG programme we used sets the trap flag, so we could step through the execution one instruction at a fourth dimension.
Sign Flag (SF) − It shows the sign of the result of an arithmetic operation. This flag is gear up co-ordinate to the sign of a data item following the arithmetic operation. The sign is indicated by the loftier-order of leftmost bit. A positive result clears the value of SF to 0 and negative result sets it to 1.
Zero Flag (ZF) − It indicates the consequence of an arithmetics or comparison performance. A nonzero outcome clears the zero flag to 0, and a zero event sets it to 1.
Auxiliary Carry Flag (AF) − It contains the conduct from bit 3 to bit iv following an arithmetic operation; used for specialized arithmetic. The AF is set when a one-byte arithmetic operation causes a comport from bit 3 into fleck 4.
Parity Flag (PF) − It indicates the total number of ane-bits in the result obtained from an arithmetic operation. An even number of 1-bits clears the parity flag to 0 and an odd number of i-bits sets the parity flag to i.
Conduct Flag (CF) − It contains the carry of 0 or ane from a high-order bit (leftmost) afterward an arithmetic functioning. It also stores the contents of last bit of a shift or rotate operation.

The following table indicates the position of flag bits in the 16-chip Flags register:

Flag:					O	D	I	T	Due south	Z		A		P		C
Bit no:	15	14	13	12	11	ten	ix	8	7	6	v	4	iii	two	1	0

Segment Registers

Segments are specific areas divers in a plan for containing data, code and stack. In that location are three main segments −

Code Segment − It contains all the instructions to be executed. A 16-bit Code Segment annals or CS register stores the starting accost of the code segment.
Data Segment − Information technology contains data, constants and piece of work areas. A 16-bit Data Segment annals or DS register stores the starting address of the information segment.
Stack Segment − It contains information and return addresses of procedures or subroutines. It is implemented as a 'stack' data structure. The Stack Segment register or SS register stores the starting accost of the stack.

Apart from the DS, CS and SS registers, at that place are other extra segment registers - ES (extra segment), FS and GS, which provide additional segments for storing information.

In associates programming, a program needs to access the retentivity locations. All retentiveness locations within a segment are relative to the starting address of the segment. A segment begins in an address evenly divisible by 16 or hexadecimal ten. So, the rightmost hex digit in all such memory addresses is 0, which is not more often than not stored in the segment registers.

The segment registers stores the starting addresses of a segment. To get the exact location of data or educational activity inside a segment, an starting time value (or displacement) is required. To reference any retention location in a segment, the processor combines the segment address in the segment register with the offset value of the location.

Example

Look at the following simple program to sympathise the utilize of registers in assembly programming. This programme displays 9 stars on the screen along with a unproblematic message −

section	.text    global _start	 ;must be declared for linker (gcc) 	 _start:	         ;tell linker entry point    mov	edx,len  ;bulletin length    mov	ecx,msg  ;bulletin to write    mov	ebx,1    ;file descriptor (stdout)    mov	eax,4    ;system call number (sys_write)    int	0x80     ;call kernel 	    mov	edx,9    ;message length    mov	ecx,s2   ;message to write    mov	ebx,ane    ;file descriptor (stdout)    mov	eax,four    ;system call number (sys_write)    int	0x80     ;call kernel 	    mov	eax,1    ;organization phone call number (sys_exit)    int	0x80     ;call kernel 	 section	.data msg db 'Displaying 9 stars',0xa ;a message len equ $ - msg  ;length of message s2 times 9 db '*'

When the above code is compiled and executed, information technology produces the following result −